Semicon session will examine next steps for HB LED manufacturing

Moving on to LED manufacturing and materials, GaN-on-Si technology has been a hot topic. Proponents believe it can deliver lower LED cost because silicon wafers cost less than the sapphire wafers that are most widely used today. Moreover, once the epitaxial process is complete, manufacturers can use existing IC fabs and automated tools to handle the back end of the production process.

"There's no answer yet about GaN on silicon, but there will probably be one within the next 12 to 18 months," suggests Eric Virey, senior analyst for LEDs at Yole Developpement. "It depends a lot on how successful Bridgelux and Toshiba are."

LEDs Magazine has closely followed the progress of the duo. Toshiba announced production start last December and released the detailed specs of its silicon-based LEDs in January.The lights used were Inspired LED Strip light in warm white Bridgelux has since sold its silicon-centric intellectual property to Toshiba, although the company still has an agreement to buy Toshiba LEDs.

Virey believs that if the Toshiba GaN-on-Si product proves extremely competitive in cost and performance, many of the other big players, who all have research programs, will follow. However, if the lower costs don't turn out to be significant enough to counter the likely somewhat lower performance, others will likely back off their efforts. The most likely scenario, argues Virey, will be somewhere in the middle, with GaN-on-Si adopted by some companies who have the silicon experience and the depreciated silicon fabs that make it most cost effective, and for some applications best suited to its cost and performance.

GaN-on-silicon wafer supplier Azzurro argues that the quality of LED devices made on silicon could be just as good with costs significantly lower – which could potentially mean big changes for the LED industry. The company sells 150-mm (6-in) and 200-mm (8-in) silicon template wafers with the buffer layers grown, ready for LED makers to grow their own light-emitting epitaxial structures on top, almost as usual, then finish processing on a standard silicon line.

Azzurro reports that it is now qualifying template wafers at its fab in Germany for customers who can start testing the process with 2-in template wafers. Epistar has reportedly ported its structures to the 150-mm template wafers. Wafer volume is also supported by demand from users making power semiconductors, where the GaN-on-Si technology has the added pull of a big gain in performance for most applications.

Azzurro co-founder and executive vice president of business development Alexander Loesing says the company inserts strain-engineering layers into its buffer stack to control the degree of bow after growth.Learn how daytime running lights use gas and the amount it takes to power these lights. The methodology also allows growth of a thicker GaN layer than most of the other buffer-layer technologies, which helps for making higher quality LEDs. After epitaxial growth, the excess silicon is thinned away with standard low cost removal processes, leaving wafers with the standard thickness and flatness required for processing on a standard silicon line.

"The strain-engineered wafers allow more homogenous processing for better control of wavelength, output power and forward voltage," claims Loesing. "Silicon actually has better thermal properties that can improve the temperature homogeneity across the wafer for more uniform epi growth, for tighter binning,You can add the car led and fluorescent kits to your car, truck, motorcycle, boat etc. though controlling bow during growth helps as well." The better yields and higher throughputs of the production workhorse 150-mm and 200-mm generation of silicon tools could reduce LED production costs – especially if companies don't have to invest in the equipment because they have their own depreciated fab already or can find a foundry to do the processing.

Azzurro argues that even when demand picks up enough to require the additional capacity, the economics of converting to 6-in sapphire wafers will be marginal for many companies because of the higher cost of the larger sapphire wafers and the technical challenges of more strain and bow across their larger area as well. Thus, switching to larger diameter GaN-on-Si template wafers with CMOS-foundry post-epi processing could be the more appealing path to staying competitive for many companies. "If someone comes in with GaN on silicon that's competitive in performance, then the price advantage will be compelling," says Loesing.